Workshop Schedule
A preliminary program will be published in late March
SPI 2025 – 29th IEEE Workshop on Signal and Power Integrity
May 11-14, 2025 – Gaeta, Italy
SPI 2025 – 29th IEEE Workshop on Signal and Power Integrity
May 11-14, 2025 – Gaeta, Italy
A preliminary program will be published in late March
EPC e-mode GaN FETs are capable of switching in one ns currents of few hundreds A and voltages up to 200V. To exploit this capability, device packaging, PCB layout, gate drivers and passive components all play an important role. In this presentation we will provide guidelines to achieve an optimal design with robust and fast switching, and minimal emissions.
Tiziano Morganti, PhD, is Staff Field Application Engineer, supporting customers in EMEA, and subject matter expert for Class-D Audio amplifiers at EPC. Previously, he cumulated 20 years working experience as design engineer, system architect and project engineer, mostly related to professional audio amplifiers. He holds a MSc in Electronics and a PhD in Electronics of Digital Systems.
With increasing switching frequencies and decreasing rise/fall times, PCB parasitics play an increasingly important role in the operation of Power Electronics circuits. Same goes for the current return paths, component parasitics and other non-ideal circuit behaviors. To avoid, or at least significantly reduce, long debugging sessions on the board prototype it is necessary to put in place a comprehensive simulation-driven design process, starting with a working circuit simulation that’s completely consistent with the PCB routing and BOM. The second step is then to extract an accurate EM model of the PCB and then finally combine them in a Circuit-EM co-simulation to result in an accurate digital twin of the entire circuit that can be used to fine-tune the circuit to achieve optimal performance and as a basis to drive whatever prototype debugging is still needed towards faster resolution.
Francesco Palomba is Technical Support Manager in Keysight, responsible for EDA products. He received his Ph.D on Applied Physics from University of Naples “Federico II” in 1999, discussing a thesis about RF Applications of Multilayered Superconductors. Over the years he was interested in a variety of different disciplines, including RF properties of High Temperature Superconductors, RF and microwave design using III-V semiconductors, HEMT modelling, Signal and Power Integrity Analysis. His current domain of interest is Fast Switching Power Electronics and Wide-Bandgap Device Applications, with a particular focus on the accurate predictability of PCB Parasitic Effects and Design Simulation Techniques.
The pursuit of enhanced power conversion efficiency is crucial for sustainability. While the consumer market has been at the forefront of adopting Gallium Nitride (GaN) technology, the drive for higher performance raises safety concerns, especially in markets with stringent certification requirements. The automotive, industrial, and energy sectors are projected to see a 50% annual growth in GaN adoption, necessitating tailored protection solutions to meet IEC safety standards for fast Wide Bandgap (WBG) switches. Effective solutions require a holistic approach that involves system design, component design, and collaboration with end customers, alongside newer solutions compared to IGBT and MOS technologies.
Fabio Quaglia is a Product Marketing Manager at Analog Devices Inc., specializing in isolated products with a primary focus on power conversion. He joined ADI in 2023 after 23 years at STMicroelectronics. Previously, he led advanced research projects in the MEMS and Actuator group for 8 years. He has led R&D and product development in medical ultrasound, power conversion, and hard-disk drives. Fabio holds 11 patents and is the author or co-author of 30 papers.
Andrea C. Ferrari earned a PhD in electrical engineering from Cambridge University, after a Laurea in nuclear engineering from Politecnico di Milano, Italy.
He is Professor of nanotechnology and Professorial Fellow of Pembroke College. He founded and directs the Cambridge Graphene Centre and the EPSRC Centre for Doctoral Training in Graphene Technology. He chairs the management panel and is the Science and Technology Officer of the European Graphene Flagship. He is a Fellow of the American Physical Society, Fellow of the Materials Research Society, Fellow of the Institute of Physics, Fellow of the Optical Society and he has been recipient of numerous awards, such as the Royal Society Brian Mercer Award for Innovation, the Royal Society Wolfson Research Merit Award, the Marie Curie Excellence Award, the Philip Leverhulme Prize, The EU-40 Materials Prize. He also received 4 European Research Council Grants.
Professor Ferrari research interests include nanomaterials growth, modeling, characterization, and devices. In particular, he focuses on graphene, nanotubes, diamond-like carbon, and nanowires for applications in electronics and photonics.
Giovanni Frattini received the M.S. degree in electronic engineering from the University of Pavia, Italy, in 1997.
In the same year he joined STMicroelectronics, Milan, Italy, as an Analog Designer in the BCD technology research and development group, where he was involved in designing signal analog circuitry for smart power chips, data converters, HV linear and dc/dc power converters. In 2008 he joined National Semiconductor (then Texas Instruments), to start and lead the Research and Development Team in the Design Center located in Milan, Italy. He served as Senior Technologist for the R&D teams in Italy and Germany for power management applications. Since 2019 he joined Analog Devices in Milan, Italy.
His current research interests include fully integrated power converters, high-voltage applications, high-frequency switching power conversion, isolated power converters and isolated gate drivers. He is author or co-author of 38 papers and holds 16 patents.
Dr. Wendem Tsegaye Beyene has been employed, in the past, by IBM, Hewlett-Packard, and Agilent Technologies, Rambus, and Intel. He is currently an Analog & Mixed Signal Architect in Reality Labs at Meta Platforms.
Dr. Beyene is an IEEE fellow, and a Senior Area Editor of IEEE CPMT and has served as a Distinguished Lecturer for IEEE EMCS as well as for IEEE EPS societies since 2020. He is also an elected Associate Fellow of the Ethiopian Academy of Sciences. Since 2022, he has organized an annual IEEE EPS and IEEE EDS sponsored conference, DTMES, in Addis Ababa, Ethiopia, with an intention of creating and boosting research in the areas of electronic design for devices, chips, packages, and systems in Ethiopia and the rest of Africa.
Marco Donald Migliore received the Laurea (Hons.) and Ph.D. degrees in electronic engineering from the University of Naples Federico II, Naples, Italy . He is a Full Professor at the University of Cassino and Southern Lazio, Cassino, Italy, where he also directs the Microwave Laboratory.
Professor Migliore has held visiting professorships at several international institutions, including the University of California San Diego, USA; the University of Rennes I, France; the Centria Research Center, Finland; and Harbin Technical University, China.
His main scientific interests currently include the synthesis and characterization of antennas and high-frequency components, massive MIMO antennas and propagation, electromagnetic information theory, and medical and energetic applications of microwaves.
In 2009, Grégory Houzet defended his Ph.D thesis at the University of Lille with a subject on the propagation of electromagnetic waves in metamaterials and the possibility of tuning these structures using ferroelectric thin films.
Since 2010, he has joined the Centre for Radiofrequencies, Optic and Micronanoelectronics in the Alps (CROMA) at the Université Savoie Mont Blanc as an associate professor. He conducts his research on high-frequency characterization techniques for dielectric materials, and more recently on antennas for telecommunications or biomedical applications.
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Integrating a complete electronic system into a single package presents both challenges and opportunities, requiring a shift in design perspective compared to traditional discrete, board-level implementations. This talk will use the example of an integrated isolated DC/DC converter to illustrate how system integration impacts circuit topology selection and key parameters. The discussion will begin with the most significant factor: switching frequency, which influences the choice of technology for the magnetic component, its design constraints, and overall performance. Additionally, electromagnetic modeling, simulation, and optimization of the entire system, including packaging and interconnections, are essential for achieving the optimal size/performance tradeoff. In these systems, all of these factors are interdependent, requiring a holistic approach to design and simulation.
As compute platforms evolve from mainframes and desktops toward laptops, portable tablets, smartphones and AR/AV Devices and back to data centers (in the age of AI), the demands of signal integrity and power integrity (SI/PI) challenges have been growing and changing. The newer platforms require more complex and sometimes drastically different SI/PI analysis approaches to optimize the system performance that are specific to these platforms.
In this talk, I will start with a review of the key methods developed in the last three decades to accurately solve very complex SI/PI problems, that have now become indispensable tools in designing the most powerful compute and communication electronic systems all around us. These accomplishments have been possible with the use of techniques such as scattering parameters, recursive convolution, model order reduction, target impedance, statistical simulation etc.
Then, the SI/PI techniques were successfully used to solve the latest power distribution network challenges of current SoC chips from very low power to very large power with trillions of gates in the latest technology node as well as high-speed signaling challenges at the data rates beyond 224 Gbps were also examined. This will be followed by a brief introduction to the machine learning techniques, where the details of some of the most promising machine learning techniques applied to signal and power integrity problems are reviewed. These include machine learning techniques applied to model order reduction, target power impedance of power distribution of modern SoC, and design space exploration, to name a few.
Accurate S-parameter measurements of high-frequency devices using Vector Network Analyzers (VNAs) require careful correction of systematic errors. This involves the use of a suitable calibration procedure, by which the response of the measurement circuit can be effectively separated from the raw measurement data to isolate the actual response of the device. The accuracy of this calibration process, together with the precision of the measurement procedure itself, significantly influences the final measurement uncertainty.
This tutorial introduces the theoretical basis of VNA calibration techniques and provides practical guidance on their correct implementation for high-frequency S-parameter measurements.
Topics include:
– Error Evaluation: How to analyze systematic errors in transmission and reflection measurements using signal flow graph.
– Calibration Techniques: How to reduce systematic errors in transmission measurements using calibration techniques, analyzing the advantages and critical points of the VNA calibration process.
– Practical Considerations: Some strategies for correctly implementing the calibration process and improving measurement accuracy.
– Application examples: Practical examples of microwave measurements for materials characterization.
The proposed tutorial will take place through several examples of wide-band frequency characterization of materials dedicated to microelectronics. The characterization consists of extracting the relative permittivity and the loss tangent of the materials, it includes several steps which will be reviewed during the tutorial.
The tutorial will cover the following points:
1 – Synthetic presentation of the different existing characterization techniques (transmission line, cavity, waveguide, etc). Selected techniques, justification of choices.
2 – Presentation of the wideband frequency measurement system used: Vector Network Analyzer, coaxial cables and GSG 67 GHz and 110 GHz microwave measurement probe dedicated to microelectronics: coaxial connectivity is not suitable for connecting to microelectronic devices.
3 – Quick reminder of the S parameters: reflection coefficients S11 and S22 and transmission coefficients S21 and S12.
4 – Calibration of the measuring system under probes dedicated to the microwave measurement of microelectronic devices. Quick explanation of what calibration is and what it is used for; LRRM calibration will be taken as an example because it allows wide frequency band measurements. Use of specific calibration substrates.
5 – Description of the test vehicles necessary for characterization: they consist of the test structure which contains the material to be characterized and the electrical connections which allow them to be connected to the measurement system.
6 – Following the measurement of the S parameters of the test vehicles, presentation of the de-embedding technique which allows to extract the quantities associated only with the test structure: the ABCD parameters for instance.
7 – Establishment of the electrical model of the test structure which includes the elements that are related to the electrical properties (permittivity and loss tangents) of the materials to be characterized: these are for example the parameters G (S/m or S) and C (F/m or F) of a transmission line or a capacitive device. Presentation of the process that allows these parameters to be extracted from the measurements.
8 – Establishment of the relationships between the parameters of the electrical model of the test structure (G and C for example) and the relative permittivity, the loss tangent of the material to be characterized. Determination of the relative permittivity and the loss tangent.
Examples chosen to illustrate the tutorial:
a) Characterization of the “CORE” material. This material is present in multilayer substrates that allow the packaging of integrated circuits. The multilayer substrate receives the electronic chip and its encapsulation in a resin. Transmission line characterization technique. Use of conformal transformation.
b) Characterization of molding resin. The resin allows the electronic chip to be encapsulated during the integrated circuit packaging phase. Characterization method by direct contact measuring probe / material. The resin is a material that is not technologically mature, it is impossible to integrate characterization devices such as transmission lines or capacitive types.
c) Characterization of Solder Mask material. The solder mask participates in the packaging of integrated circuits. It is a thin layer that is typically applied to multilayer substrates (dedicated to packaging) to protect the copper lines from oxidation. Differential characterization technique in transmission line. Use of conformal transformation.
d) Other materials and techniques depending on the time remaining.